Dr. Tech Tiberiu SECELEANU
Assistent Professor
Univ. of Turku

Dept. of IT, Electronics and Communication Systems Laboratory
DataCity
Lemminkäisenkatu 14 B
5th floor

PostCode : 20520
Turku
FIN-20520
Finland
Telephone : +358-2-3336954
http://www.it.utu.fi/
tiberiu.seceleanu@utu.fi

The Department of Information Technology in the University of Turku was founded on January 1st, 2002. It is a coalition of three subjects: computer science, which was formerly a part of the Department of Mathematics, electronics and telecommunications technology, formerly a part of applied physics, and the Master of Science in Technology, Computer Science and Engineering training, which began in the University of Turku in 1999. There are approximately a thousand master's degree students in the department and about fifty graduate students. The intake of students was nearly 300 in 2002.

There are about a hundred members of staff in the department, sixty of whom are involved in teaching. Teaching in the department is versatile and of high quality. There is a variety of courses available, ranging from VLSI-design to the socio-technological development of information systems. The available courses as well as the degree requirements vary according to the main subject. Among our latest teaching projects is the training in software engineering, which began in the autumn of 2001. Training in the field of information industry has been organized since 1999 and the first masters from this field graduated in the spring of 2002. In this training students can transform their older degrees into new master’s degrees.

In addition to teaching, research is an important part of the department activities. As teaching, research is also versatile and of high quality. Among the research fields are algorithmics, bioinformatics, digital and analogue circuit design, biomedical signal analysis, telecommunications algorithms, microelectronics, information systems and work, and embedded systems. Our research also has strong connections to practice, for example in the form of spin-off companies.

The Department has excellent communication and strong links with other universities in Finland. A very powerful relation is established between the Department of Computer Science and the Department of Information Systems of the Åbo Akademi, as basis for cooperation in the larger framework offered by the Turku Centre for Computer Science, a well known research institute.

Persons to be involved with the PatiMon Network of Excellence (in alphabetical order):

• Afshin David, TechEng, BSc, MSc, PhD.

Senior Research Fellow in the School of Information Technology at University of Turku.

His research interests include System modeling and simulation; Image processing and Software radio design. A senior engineer at Altera Inc. and Cogency Inc., his main expertise are in the design of embedded control and communication systems. He has also been involved with the EU SoCMobinet project.

Recent publications:

1. Afshin David, "Wavelet Kalman Based Reconstruction", ICME 2002, IEEE International Conference on Multimedia, Lausanne, Switzerland, August 26- 29, 2002

2. Afshin David, and T. Aboulnasr, "A Maximum Entropy Kalman Filter For Image Compression", The 43rd Midwest Symposium, on Circuit and Systems, Lansing, Michigan, USA, August 8-11, 2000

3. Afshin David, and T. Aboulnasr, "A Globally Convergent Adaptive IIR Filter", IEEE International Symposium on Circuits and Systems, pp. III-531 - III-534, Geneva, Switzerland, May 28-31, 2000

4. Afshin David and S. Panchanathan, " Wavelet-histogram method for Face Recognition", Journal of Electronic Imaging, No. 2, Vol. 9, pp. 217-226, April 2000

5. Afshin David, and T. Aboulnasr, "A Maximum Entropy Kalman Filter For Signal Reconstruction", IEEE International Symposium on Circuits and Systems, pp. IV-151 - IV-154, Orlando, Florida, May 28-31, 2000

• Juha Plosila, PhD.

Assistant Professor, University of Turku, Dept. of Information Technology.

Education:

Ph.D, Electronics and Information Technology, University of Turku, Finland, 1999.

M.Sc, Electronics and Information Technology, University of Turku, Finland, 1993.

Teaching: digital integrated circuit design, digital systems engineering.

Expertise (research interests): formal methods in digital system design, Action Systems formalism, asynchronous self-timed communication and circuit techniques, mixed synchronous / asynchronous design, novel system-on-chip architectures and their implementation.

Recent publications:

1. J. Plosila, K. Sere, and M. Walden. Component-based Circuit Design Using Action Systems. In Proc. of FMCO2002, LNCS Springer-Verlag 2003. To appear.

2. J. Plosila and T. Seceleanu. Specification of an Asynchronous On-Chip Bus. In Proc. of ICFEM 2002 International Conference on Formal Engineering Methods, Shanghai, China, October 2002.

3. T. Seceleanu, J. Plosila, and P. Liljeberg. On-Chip Segmented Bus: A Self-Timed Approach, In Proc. of the 15 th Annual IEEE International ASIC/SOC Conference, September 2002

4. P. Liljeberg, I. Ben Dhaou, J.Plosila, J. Isoaho, and H. Tenhunen. Interconnect Peak Current Reduction for Wavelet Array Processor Using Self-Timed Signaling. In Proc. of ISCAS 2002 International Symposium on Circuits and Systems, Scottsdale, Arizona, USA, May 2002.

5. P. Liljeberg, J. Plosila, and J. Isoaho. Asynchronous Interface for Locally Clocked Modules in ULSI Systems. In Proc. of ISCAS 2001 International Symposium on Circuits and Systems, Sydney, Australia, May 2001.

6. P. Liljeberg, J. Plosila, and J. Isoaho. Self-Timed Design Concepts for IP based Systems. In Proc. of the IP 2000 System-on-Chip Conference & Exhibition, pp. 153-166, Santa Clara, CA, USA, March 2000.

• Tiberiu Seceleanu, DrTech.

Current position: Assistant Professor with the University of Turku, Finland.

2001 – Doctor of Technology degree obtained from Åbo Akademi, Turku, Finland. Thesis: Systematic Design of Synchronous Digital Circuits.

1995 – LicSc (Advanced Studies degree). Same institute. Thesis on current multimedia issues.

1994 - MSc. University Politehnica – Department of Electronics & Telecommunications, Bucharest, Romania. Graduation thesis on teleworking issues, realized within a TEMPUS project, at the University of Patras, Greece.

Teaching experience: Hardware Description Languages, System-on-Chip Design.

Expertise:

o Hardware description languages (HDLs), formal methods in hardware design, synchronous / asynchronous design.

o At the present time, participant in the ITEA P2I project (FP5).

Research interests: HDLs, System-on-Chip design, formal methods.

Recent publications:

1. T. Seceleanu, J.Plosila. Formal Pipeline Design. In Proceedings of the 11 th Advanced Research Working Conference on Correct Hardware Design and Verification Methods, Livingston, Scotland, September 2001, pages 167-172.

2. T.Seceleanu, J.Plosila, P. Liljeberg. On-Chip Segmented Bus: A Self Timed Approach. In Proceedings of the 15 th IEEE ASIC/SOC Conference, Rochester, New York, September, 2002, pages 216-221.

3. T.Seceleanu, J.Plosila. Hierarchical Action Systems. Proceedings of Forum on Design Languages 2002, Marseille, France.

4. J.Plosila, T.Seceleanu. Specification of an Asynchronous On-Chip Bus. Proceedings of the 4th International Conference on Formal Engineering Methods (ICFEM 2002), October 21-25, 2002, Shanghai, China, pages 383-395.

• Kaisa Sere, PhD.

Current position: Professor (Computer Engineering) at the Department of Computer Science, Åbo Akademi University.

Teaching experience: Courses on formal methods in general, formal methods in hardware design, distributed systems.

International experience: extensive co-operation with several research groups outside Finland, mainly within the field of formal methods in system design.

Scientific Achievement: organised several conferences and summer schools on formal methods. PC member in several conferences and workshops.

Recent publications: more than 20 journal papers, 1 book, 70 conference papers and several technical reports.

Our main competence:

• Formal system design.

• Signal analysis & processing.

• Low-power design.

Our possible contribution to the PatiMon may come in the following areas:

We are interested to offer our expertise in the directions of the PatiMon NoE. We think that the mostly technical background of our side may in support of developing especially embedded hardware appliances that may be the results of certain cooperation between participants in the NoE. Thus, generally, our contribution may lay in the fields of:

• T1: System Modeling and Control, design and development of application specific integrated circuits.

• T2: Low-power devices.

• T3: Communication protocols, formal modeling and implementation.

• T4: Signal processing: pattern detection and recognition, signal compression, embedded system design.